This invention relates to electronic reference circuitry. More particularly, the invention relates to voltage reference drivers that provide a substantially constant output voltage when periodically coupled to a reactive load.
Voltage references have been widely used in electronics applications for many years. The purpose of a voltage reference is to provide a stable voltage that is substantially independent of external stimuli, such as variations in temperature, power supply voltage, and loading conditions. Such references form a vital part of numerous commonly used circuits, such as analog to digital (ADC) and digital to analog (DAC) converters, phase-locked loops, voltage regulators, comparison circuits, etc.
In the case of analog to digital converters, voltage reference circuitry is used to provide a voltage from which comparisons are made in order to quantize a sampled analog signal into the digital domain. For example, a sampled analog input signal may be compared in succession to multiple voltage levels, which are based in part on the reference voltage. The outcome of these comparisons is used to create a digital word which represents a digital value of the sampled analog signal. Such converters are known in the art as Successive Approximation Register converters (SARs).
One popular type of SAR is the charge redistribution SAR which uses a charge-scaling DAC to provide selected fractions of the reference voltage by way of voltage division. This is typically implemented as an array of individually switched capacitors which combine to produce sums of binary-weighted fractions of the reference voltage. The sum of the input signal and the selected fractions of the reference voltage are successively compared to a preset level (e.g., ground) to produce comparison bits that are combined to produce a digital word representing the sampled analog input signal.
In order for the charge-scaling DAC described above to operate with the desired precision, it is important that the reference voltage used to synthesize the DAC output, which is to be weighted against the sampled analog input signal, remains substantially constant. Variation of the reference voltage can introduce comparison errors, resulting in the creation of imprecise or inaccurate digital words, and thus limit the degree of resolution achievable with a given converter architecture.
Accordingly, numerous schemes for maintaining a substantially constant reference voltage in both DAC and ADC circuits have been proposed. Because the charge-scaling DAC in a successive approximation ADC switches some or all of its capacitors to the reference voltage in response to the sampled analog signal value, there may be a non-trivial inrush current drawn from the voltage reference circuit. This inrush current creates transient spikes on the reference circuit's output voltage. The spikes themselves may not necessarily be detrimental to the ADC's overall operation and precision, provided that the reference voltage settles substantially to its nominal value by the time the selected fractions thereof are compared to the sampled analog signal value. However, if the inrush currents and the transient spikes are influenced by the sampled input signal, which typically is the case, the reference voltage may be modulated by the sampled input signal and a distortion of the corresponding digital values may result.
Depending on the physical implementation of the circuitry, there may be a relatively complicated relationship between the input signal under conversion, the inrush currents, the transient spikes, and the distortion induced by the inrush currents. Distortion induced by the inrush currents may adversely affect the analog to digital conversion, and thus it is desirable to design the reference voltage circuitry such that the reference voltage is substantially independent of inrush currents.
Thus, in view of the above, it would be desirable to provide circuitry and methods that maintain a substantially constant output voltage when such circuitry is periodically coupled to a reactive load causing transient spikes that may be influenced by an input signal.
It would also be desirable to provide circuitry and methods that maintain a substantially constant output voltage driving a switched-capacitor DAC.